Search results for "High-Level Synthesis"
showing 6 items of 6 documents
FPGA Implementation of an Adaptive Filter Robust to Impulsive Noise: Two Approaches
2011
Adaptive filters are used in a wide range of applications such as echo cancellation, noise cancellation, system identification, and prediction. Its hardware implementation becomes essential in many cases where real-time execution is needed. However, impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms, particularly in specific hardware platforms. Field-programmable gate arrays (FPGAs) are used widely for real-time applications where timing requirements are strict. Nowadays, two main design processes can be followed for embedded system design…
Hardware implementation of a robust adaptive filter: Two approaches based in High-Level Synthesis design tools
2009
Abstract Adaptive filters are used in a wide range of applications. Impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms. Field Programmable Gate Array (FPGA) are widely used for applications where timing requirements are strict. Nowadays, two main design processes can be followed, namely, Hardware Description Language (HDL) and a High Level Synthesis (HLS) design tool for embedded system design. This paper describes the FPGA implementation of an adaptive filter robust to impulsive noise using two approaches based in HLS and the implementati…
Embedded multi-spectral image processing for real-time medical application
2016
International audience; The newly introduced Kubelka-Munk Genetic Algorithm (KMGA) is a promising technique for the assessment of skin lesions from multi-spectral images. Using five skin parameter maps such as concentration or epidermis/dermis thickness, this method combines the Kubelka-Munk Light-Tissue interaction model and Genetic Algorithm optimization process to produce a quantitative measure of cutaneous tissue. Up to the present, variant improved KMGA implementations have been successfully realized using the recent parallel computing techniques. However, all these achievements are based on the multi-core CPUs. This results in a quite high cost and low practicability for the hardware …
Design of a Real-time face detection parallel architecture using High-Level Synthesis
2008
Abstract We describe a High-Level Synthesis implementation of a parallel architecture for face detection. The chosen face detection method is the well-known Convolutional Face Finder (CFF) algorithm, which consists of a pipeline of convolution operations. We rely on dataflow modelling of the algorithm and we use a high-level synthesis tool in order to specify the local dataflows of our Processing Element (PE), by describing in C language inter-PE communication, fine scheduling of the successive convolutions, and memory distribution and bandwidth. Using this approach, we explore several implementation alternatives in order to find a compromise between processing speed and area of the PE. We …
A hardware skin-segmentation IP for vision based smart ADAS through an FPGA prototyping
2017
International audience; In this paper we presents a platform based design approach for fast HW/SW embedded smart Advanced Driver Assistant System (ADAS) design and prototyping. Then, we share our experience in designing and prototyping a HW/SW vision based smart embedded system as an ADAS that helps to increase the safety of car's drivers. We present a physical prototype of the vision ADAS based on a Zynq FPGA. The system detects the fatigue state of the driver by monitoring the eyes closure and generates a real-time alert. A new HW/SW codesign skin segmentation step to locate the eyes/face is proposed. Our presented new approach migrates the skin segmentation step from processing system (S…
FPGA-based smart camera : industrial applications
2013
International audience; For the last two decades and still today, smart cameras offer innovative solutions for industrial vision applications. This kind of system associates a flexible image acquisition with high-speed processing possibilities. Many smart camera designs are based on FPGA components to obtain these two features. Indeed, the FPGA enables the CMOS sensor to be controlled and therefore to propose a configurable acquisition according to the application constraints (i.e. dynamic windowing). The configurable structure of a FPGA represents a key advantage for modifying the embedded processing (even on-the-fly using dynamic reconfiguration). Meanwhile, FPGA components offer a large …